uturn* at mainbus?
runway bus is a CPU and memory bus on
systems based on the PA-7200, PA-8000, and later CPUs. The
runway bus is a 64-bit multiplexed address/data bus
with support for cache coherency and allows up to 4-way SMP system
One or two uturn(4) bridges connect the
bus to the system's gsc(4) or pci(4) buses.
cpu(4), dino(4), gsc(4), intro(4), pci(4), uturn(4)
runway driver first appeared in