NAME

make — maintain program dependencies

SYNOPSIS

DESCRIPTION

make is a program designed to simplify the maintenance of other programs. Its input is a list of specifications as to the files upon which programs and other files depend. If the file ‘BSDmakefile’ exists, it is read for this list of specifications. If it does not exist, the files ‘makefile’ and ‘Makefile’ are tried in order. If the file ‘.depend’ exists, it is read in addition to the makefile (see mkdep(1)).

The handling of ‘BSDmakefile’ and ‘.depend’ are BSD extensions.

Standard options are as follows:

-e

Specify that environment variables override macro assignments within makefiles.

-f makefile

Specify a makefile to read instead of the default ‘makefile’ and ‘Makefile’. If makefile is ‘-’, standard input is read. Multiple makefiles may be specified, and are read in the order specified.

-i

Ignore non-zero exit of shell commands in the makefile. Equivalent to specifying ‘-’ before each command line in the makefile.

-k

Continue processing after errors are encountered, but only on those targets that do not depend on the target whose creation caused the error.

-n

Display the commands that would have been executed, but do not actually execute them.

-q

Do not execute any commands, but exit with status 0 if the specified targets are up-to-date, and 1 otherwise.

-r

Do not use the built-in rules specified in the system makefile.

-S

Stop processing when an error is encountered. This is the default behavior. This is needed to negate the -k option during recursive builds.

-s

Do not echo commands as they are executed. Equivalent to specifying ‘@’ before each command line in the makefile.

-t

Rather than re-building a target as specified in the makefile, create it or update its modification time to make it appear up-to-date.

NAME=value

Set the value of the variable NAME to value.

Extended options are as follows:

-B

Try to be backwards compatible by executing a single shell per command and by executing the commands to make the sources of a dependency line in sequence. This is turned on by default unless -j is used.

-D variable

Define variable to be 1.

-d flags

Turn on debugging, and specify which portions of make are to print debugging information. flags is one or more of the following:

A

Print all possible debugging information; equivalent to specifying all of the debugging flags.

a

Print debugging information about archive searching and caching.

c

Print debugging information about conditional evaluation.

d

Print debugging information about directory searching and caching.

f

Print debugging information about the expansion of for loops.

g1

Print the input graph before making anything.

g2

Print the input graph after making everything, or before exiting on error.

J

Print job tokens showing which output corresponds to what job.

j

Print debugging information about running multiple shells.

l

Print commands in Makefile targets regardless of whether or not they are prefixed by @. Also known as loud behavior.

m

Print debugging information about making targets, including modification dates.

n

Print debugging information about target names equivalence computations.

p

Help finding concurrency issues for parallel make by adding some randomization. If RANDOM_ORDER is defined, targets will be shuffled before being built. If RANDOM_DELAY is defined, make will wait between 0 and ${RANDOM_DELAY} seconds at the start of each job. A given random seed can be forced by setting RANDOM_SEED, but this does not guarantee reproductibility.

s

Print debugging information about suffix-transformation rules.

t

Print debugging information about target list maintenance.

v

Print debugging information about variable assignment.

-I directory

Specify a directory in which to search for makefiles and included makefiles. The system makefile directory (or directories, see the -m option) is automatically included as part of this list.

-j max_jobs

Specify the maximum number of jobs that make may have running at any one time. Turns compatibility mode off, unless the -B flag is also specified.

-m directory

Specify a directory in which to search for sys.mk and makefiles included via the <...> style. Multiple directories can be added to form a search path. This path will override the default system include path: /usr/share/mk. Furthermore, the system include path will be appended to the search path used for "..."-style inclusions (see the -I option).

-P

Collate the output of a given job and display it only when the job finishes, instead of mixing the output of parallel jobs together. This option has no effect unless -j is used too.

-V variable

Print make's idea of the value of variable. Do not build any targets. Multiple instances of this option may be specified; the variables will be printed one per line, with a blank line for each null or undefined variable.

There are seven different types of lines in a makefile: file dependency specifications, shell commands, variable assignments, include statements, conditional directives, for loops, and comments. Of these, include statements, conditional directives and for loops are extensions.

In general, lines may be continued from one line to the next by ending them with a backslash (‘\’). The trailing newline character and initial whitespace on the following line are compressed into a single space.

FILE DEPENDENCY SPECIFICATIONS

Dependency lines consist of one or more targets, an operator, and zero or more sources. This creates a relationship where the targets “depend” on the sources and are usually created from them. The exact relationship between the target and the source is determined by the operator that separates them. Note that the use of several targets is merely a shorthand for duplicate rules. Specifically,

target1 target2: depa depb
	cmd1
	cmd2

is just a short form of

target1: depa depb
	cmd1
	cmd2
target2: depa depb
	cmd1
	cmd2

make does not support Solaris syntax for true multiple targets:

target1 + target2: depa depb
	cmd1
	cmd2

The operators are as follows:

:

A target is considered out-of-date if its modification time is less than those of any of its sources. Sources for a target accumulate over dependency lines when this operator is used. The target is removed if make is interrupted.

!

Targets are always re-created, but not until all sources have been examined and re-created as necessary. Sources for a target accumulate over dependency lines when this operator is used. The target is removed if make is interrupted.

::

If no sources are specified, the target is always re-created. Otherwise, a target is considered out-of-date if any of its sources has been modified more recently than the target. Sources for a target do not accumulate over dependency lines when this operator is used. The target will not be removed if make is interrupted.

The :: operator is a fairly standard extension. The ! operator is a BSD extension.

As an extension, targets and sources may contain the shell wildcard expressions ‘?’, ‘*’, ‘[]’ and ‘{}’. The expressions ‘?’, ‘*’ and ‘[]’ may only be used as part of the final component of the target or source, and must be used to describe existing files. The expression ‘{}’ need not necessarily be used to describe existing files. Expansion is in directory order, not alphabetically as done in the shell.

For maximum portability, target names should only consist of periods, underscores, digits and alphabetic characters.

SHELL COMMANDS

Each target may have associated with it a series of shell commands, normally used to create the target. Each of the commands in this script must be preceded by a tab. While any target may appear on a dependency line, only one of these dependencies may be followed by a creation script, unless the ‘::’ operator is used.

If a command line begins with a combination of the characters, ‘@’, ‘-’ and/or ‘+’, the command is treated specially:

‘@’

causes the command not to be echoed before it is executed.

‘-’

causes any non-zero exit status of the command line to be ignored.

‘+’

causes the command to be executed even if -n has been specified. (This can be useful to debug recursive Makefiles.)

The command is always executed using /bin/sh in "set -e" mode.

VARIABLE ASSIGNMENTS

Variables in make are much like variables in the shell, and, by tradition, consist of all upper-case letters. They are also called ‘macros’ in various texts. For portability, only periods, underscores, digits and letters should be used for variable names. The five operators that can be used to assign values to variables are as follows:

=

Assign the value to the variable. Any previous value is overridden.

:=

Assign with expansion, i.e., expand the value before assigning it to the variable (extension).

+=

Append the value to the current value of the variable (extension).

?=

Assign the value to the variable if it is not already defined (BSD extension). Normally, expansion is not done until the variable is referenced.

!=

Expand the value and pass it to the shell for execution and assign the result to the variable. Any newlines in the result are replaced with spaces (BSD extension).

Any whitespace before the assigned value is removed; if the value is being appended, a single space is inserted between the previous contents of the variable and the appended value.

Variables are expanded by surrounding the variable name with either curly braces (‘{}’) or parentheses (‘()’) and preceding it with a dollar sign (‘$’). If the variable name contains only a single letter, the surrounding braces or parentheses are not required. This shorter form is not recommended.

Variable substitution occurs at two distinct times, depending on where the variable is being used. Variables in dependency lines are expanded as the line is read. Variables in shell commands are expanded when the shell command is executed.

The four different classes of variables (in order of increasing precedence) are:

Environment variables

Variables defined as part of make's environment.

Global variables

Variables defined in the makefile or in included makefiles.

Command line variables

Variables defined as part of the command line.

Local variables

Variables that are defined specific to a certain target. Standard local variables are as follows:

@

The name of the target.

%

The name of the archive member (only valid for library rules).

!

The name of the archive file (only valid for library rules).

?

The list of prerequisites for this target that were deemed out-of-date.

<

The name of the source from which this target is to be built, if a valid implied rule (suffix rule) is in scope.

*

The file prefix of the file, containing only the file portion, no suffix or preceding directory components.

The six variables ‘@F’, ‘@D’, ‘<F’, ‘<D’, ‘*F’, and ‘*D’ yield the "filename" and "directory" parts of the corresponding macros.

For maximum compatibility, ‘<’ should only be used for actual implied rules. It is also set when there is an implied rule that matches the current dependency in scope. That is, in

.SUFFIXES: .c .o
file.o: file.c
	cmd1 $<

.c.o:
	cmd2

building file.o will execute "cmd1 file.c".

As an extension, make supports the following local variables:

>

The list of all sources for this target.

.ALLSRC

Synonym for ‘>’.

.ARCHIVE

Synonym for ‘!’.

.IMPSRC

Synonym for ‘<’.

.MEMBER

Synonym for ‘%’.

.OODATE

Synonym for ‘?’.

.PREFIX

Synonym for ‘*’.

.TARGET

Synonym for ‘@’.

These variables may be used on the dependency half of dependency lines, when they make sense.

In addition, make sets or knows about the following internal variables, or environment variables:

$

A single dollar sign ‘$’, i.e., ‘$$’ expands to a single dollar sign.

.MAKE

The name that make was executed with (argv[0]).

.CURDIR

A path to the directory where make was executed.

.OBJDIR

A path to the directory where the targets are built. At startup, make searches for an alternate directory to place target files -- it will attempt to change into this special directory. First, if MAKEOBJDIRPREFIX is defined, make prepends its contents to the current directory name and tries for the resulting directory. If that fails, make remains in the current directory. If MAKEOBJDIRPREFIX is not defined, make checks MAKEOBJDIR and tries to change into that directory. Should that fail, make remains in the current directory. If MAKEOBJDIR is not defined, it tries to change into the directory named obj.${MACHINE} (see MACHINE variable). If it still has found no special directory, make next tries the directory named obj. If this fails, make tries to prepend /usr/obj to the current directory name. Finally, if none of these directories are available make will settle for and use the current directory.

.MAKEFLAGS

The environment variable MAKEFLAGS may contain anything that may be specified on make's command line. Its contents are stored in make's .MAKEFLAGS variable. Anything specified on make's command line is appended to the .MAKEFLAGS variable which is then entered into the environment as MAKEFLAGS for all programs which make executes.

MFLAGS

A shorter synonym for .MAKEFLAGS.

PWD

Alternate path to the current directory. make normally sets ‘.CURDIR’ to the canonical path given by getcwd(3). However, if the environment variable PWD is set and gives a path to the current directory, then make sets ‘.CURDIR’ to the value of PWD instead. PWD is always set to the value of ‘.OBJDIR’ for all programs which make executes.

.TARGETS

List of targets make is currently building.

.INCLUDES

See .INCLUDES special target.

.LIBS

See .LIBS special target.

MACHINE

Name of the machine architecture make is running on, obtained from the MACHINE environment variable, or through uname(3) if not defined.

MACHINE_ARCH

Name of the machine architecture make was compiled for, obtained from the MACHINE_ARCH environment variable, or defined at compilation time.

MACHINE_CPU

Name of the machine processor make was compiled for, obtained from the MACHINE_CPU environment variable, or defined at compilation time. On processors where only one endianness is possible, the value of this variable is always the same as MACHINE_ARCH.

MAKEFILE

Possibly the file name of the last makefile that has been read. It should not be used; see the BUGS section below.

Variable expansion may be modified to select or modify each word of the variable (where “word” is a whitespace delimited sequence of characters). The general format of a variable expansion is as follows:

Each modifier begins with a colon and one of the following special characters. The colon may be escaped with a backslash (‘\’).

:E

Replaces each word in the variable with its suffix.

:H

Replaces each word in the variable with everything but the last component.

:L

Replaces each word in the variable with its lower case equivalent.

:U

Replaces each word in the variable with its upper case equivalent.

:Mpattern

Select only those words that match the rest of the modifier. The standard shell wildcard characters (‘*’, ‘?’, and ‘[]’) may be used. The wildcard characters may be escaped with a backslash (‘\’).

:Npattern

This is identical to :M, but selects all words which do not match the rest of the modifier.

:Q

Quotes every shell meta-character in the variable, so that it can be passed safely through recursive invocations of make.

:QL

Quote list: quotes every shell meta-character in the variable, except whitespace, so that it can be passed to a shell's ‘for’ loops.

:R

Replaces each word in the variable with everything but its suffix.

:S/old_string/new_string/[1g]

Modify the first occurrence of old_string in the variable's value, replacing it with new_string. If a ‘g’ is appended to the last slash of the pattern, all occurrences in each word are replaced. If a ‘1’ is appended to the last slash of the pattern, only the first word is affected. If old_string begins with a caret (‘^’), old_string is anchored at the beginning of each word. If old_string ends with a dollar sign (‘$’), it is anchored at the end of each word. Inside new_string, an ampersand (‘&’) is replaced by old_string (without any ‘^’ or ‘$’). Any character may be used as a delimiter for the parts of the modifier string. The anchoring, ampersand and delimiter characters may be escaped with a backslash (‘\’).

Variable expansion occurs in the normal fashion inside both old_string and new_string with the single exception that a backslash is used to prevent the expansion of a dollar sign (‘$’), not a preceding dollar sign as is usual.

:C/pattern/replacement/[1g]

The :C modifier is just like the :S modifier except that the old and new strings, instead of being simple strings, are a regular expression (see regex(3)) and an ed(1)-style replacement string. Normally, the first occurrence of the pattern in each word of the value is changed. The ‘1’ modifier causes the substitution to apply to at most one word; the ‘g’ modifier causes the substitution to apply to as many instances of the search pattern as occur in the word or words it is found in. Note that ‘1’ and ‘g’ are orthogonal; the former specifies whether multiple words are potentially affected, the latter whether multiple substitutions can potentially occur within each affected word.

:T

Replaces each word in the variable with its last component.

:old_string=new_string

This is the AT&T System V UNIX style variable substitution. It must be the last modifier specified. If old_string or new_string do not contain the pattern matching character % then it is assumed that they are anchored at the end of each word, so only suffixes or entire words may be replaced. Otherwise % is the substring of old_string to be replaced in new_string. The right hand side (new_string) may contain variable values, which will be expanded. To put an actual single dollar, just double it.

All modifiers are BSD extensions, except for the standard AT&T System V UNIX style variable substitution.

The interpretation of % and $ in AT&T System V UNIX variable substitutions is not mandated by POSIX, though it is fairly common.

INCLUDE STATEMENTS, CONDITIONALS AND FOR LOOPS

Makefile inclusion, conditional structures and for loops reminiscent of the C programming language are provided in make. All such structures are identified by a line beginning with a single dot (‘.’) character. Whitespace characters may follow this dot, e.g.,

.include <file>

.   include <file>

are identical constructs. Files are included with either ‘.include <file>’ or ‘.include "file"’. Variables between the angle brackets or double quotes are expanded to form the file name. If angle brackets are used, the included makefile is expected to be in the system makefile directory. If double quotes are used, the including makefile's directory and any directories specified using the -I option are searched before the system makefile directory.

Conditional expressions are also preceded by a single dot as the first character of a line. The possible conditionals are as follows:

.undef variable

Un-define the specified global variable. Only global variables may be un-defined.

.poison variable

Poison the specified global variable. Any further reference to variable will be flagged as an error.

.poison !defined (variable)

It is an error to try to use the value of variable in a context where it is not defined.

.poison empty (variable)

It is an error to try to use the value of variable in a context where it is not defined or empty.

.if [!]expression [operator expression ...]

Test the value of an expression.

.ifdef [!]variable [operator variable ...]

Test the value of a variable.

.ifndef [!]variable [operator variable ...]

Test the value of a variable.

.ifmake [!]target [operator target ...]

Test the target being built.

.ifnmake [!] target [operator target ...]

Test the target being built.

.else

Reverse the sense of the last conditional.

.elif [!] expression [operator expression ...]

A combination of ‘.else’ followed by ‘.if’.

.elifdef [!]variable [operator variable ...]

A combination of ‘.else’ followed by ‘.ifdef’.

.elifndef [!]variable [operator variable ...]

A combination of ‘.else’ followed by ‘.ifndef’.

.elifmake [!]target [operator target ...]

A combination of ‘.else’ followed by ‘.ifmake’.

.elifnmake [!]target [operator target ...]

A combination of ‘.else’ followed by ‘.ifnmake’.

.endif

End the body of the conditional.

The operator may be any one of the following:

||

logical OR

&&

Logical AND; of higher precedence than ||.

As in C, make will only evaluate a conditional as far as is necessary to determine its value. Parentheses may be used to change the order of evaluation. The boolean operator ‘!’ may be used to logically negate an entire conditional. It is of higher precedence than ‘&&’.

The value of expression may be any of the following:

defined

Takes a variable name as an argument and evaluates to true if the variable has been defined.

make

Takes a target name as an argument and evaluates to true if the target was specified as part of make's command line or was declared the default target (either implicitly or explicitly, see .MAIN) before the line containing the conditional.

empty

Takes a variable, with possible modifiers, and evaluates to true if the expansion of the variable would result in an empty string.

exists

Takes a file name as an argument and evaluates to true if the file exists. The file is searched for on the system search path (see .PATH).

target

Takes a target name as an argument and evaluates to true if the target has been defined.

expression may also be an arithmetic or string comparison. Variable expansion is performed on both sides of the comparison, after which the integral values are compared. A value is interpreted as hexadecimal if it is preceded by 0x, otherwise it is decimal; octal numbers are not supported. The standard C relational operators are all supported. If after variable expansion, either the left or right hand side of a ‘==’ or ‘!=’ operator is not an integral value, then string comparison is performed between the expanded variables. If no relational operator is given, it is assumed that the expanded variable is being compared against 0.

When make is evaluating one of these conditional expressions, and it encounters a word it doesn't recognize, either the “make” or “defined” expression is applied to it, depending on the form of the conditional. If the form is ‘.ifdef’ or ‘.ifndef’, the “defined” expression is applied. Similarly, if the form is ‘.ifmake’ or ‘.ifnmake’, the “make” expression is applied.

If the conditional evaluates to true the parsing of the makefile continues as before. If it evaluates to false, the following lines are skipped. In both cases this continues until a ‘.else’ or ‘.endif’ is found.

For loops are typically used to apply a set of rules to a list of files. The syntax of a for loop is:

.for variable [variable ...] in expression
	<make-rules>
.endfor

After the for expression is evaluated, it is split into words. On each iteration of the loop, one word is assigned to each variable, in order, and these variables are substituted in the make-rules inside the body of the for loop. The number of words must match the number of iteration variables; that is, if there are three iteration variables, the number of words must be a multiple of three.

Loops and conditional expressions may nest arbitrarily, but they may not cross include file boundaries.

COMMENTS

Comments begin with a hash (‘#’) character, anywhere but in a shell command line, and continue to the end of the line.

SPECIAL SOURCES

.IGNORE

Ignore any errors from the commands associated with this target, exactly as if they all were preceded by a dash (‘-’).

.MADE

Mark all sources of this target as being up-to-date.

.MAKE

Execute the commands associated with this target even if the -n or -t options were specified. Normally used to mark recursive make's.

.NOTMAIN

Normally make selects the first target it encounters as the default target to be built if no target was specified. This source prevents this target from being selected.

.OPTIONAL

If a target is marked with this attribute and make can't figure out how to create it, it will ignore this fact and assume the file isn't needed or already exists.

.PRECIOUS

When make is interrupted, it removes any partially made targets. This source prevents the target from being removed.

.SILENT

Do not echo any of the commands associated with this target, exactly as if they all were preceded by an at sign (‘@’).

.USE

Turn the target into make's version of a macro. When the target is used as a source for another target, the other target acquires the commands, sources, and attributes (except for .USE) of the source. If the target already has commands, the .USE target's commands are appended to them.

.WAIT

If .WAIT appears in a dependency line, the sources that precede it are made before the sources that succeed it in the line. Loops are not detected and targets that form loops will be silently ignored.

SPECIAL TARGETS

Special targets may not be included with other targets, i.e., they must be the only target specified.

.BEGIN

Any command lines attached to this target are executed before anything else is done.

.DEFAULT

This is sort of a .USE rule for any target (that was used only as a source) that make can't figure out any other way to create. Only the shell script is used. The .IMPSRC variable of a target that inherits .DEFAULT's commands is set to the target's own name.

.END

Any command lines attached to this target are executed after everything else is done.

.IGNORE

Mark each of the sources with the .IGNORE attribute. If no sources are specified, this is the equivalent of specifying the -i option.

.INCLUDES

A list of suffixes that indicate files that can be included in a source file. The suffix must have already been declared with .SUFFIXES, any suffix so declared will have the directories in its search path (see .PATH) placed in the .INCLUDES special variable, each preceded by a -I flag.

.INTERRUPT

If make is interrupted, the commands for this target will be executed.

.LIBS

This does for libraries what .INCLUDES does for include files, except that the flag used is -L.

.MAIN

If no target is specified when make is invoked, this target will be built. This is always set, either explicitly, or implicitly when make selects the default target, to give the user a way to refer to the default target on the command line.

.MAKEFLAGS

This target provides a way to specify flags for make when the makefile is used. The flags are as if typed to the shell, though the -f option will have no effect.

.NOTPARALLEL

Disable parallel mode.

.NO_PARALLEL

Same as above, for compatibility with other pmake variants.

.ORDER

The named targets are made in sequence.

.PATH

The sources are directories which are to be searched for files not found in the current directory. If no sources are specified, any previously specified directories are deleted.

.PATHsuffix

The sources are directories which are to be searched for suffixed files not found in the current directory. make first searches the suffixed search path, before reverting to the default path if the file is not found there.

.PHONY

Apply the .PHONY attribute to any specified sources. Targets with this attribute are always considered to be out of date.

.PRECIOUS

Apply the .PRECIOUS attribute to any specified sources. If no sources are specified, the .PRECIOUS attribute is applied to every target in the file.

.SILENT

Apply the .SILENT attribute to any specified sources. If no sources are specified, the .SILENT attribute is applied to every command in the file.

.SUFFIXES

Each source specifies a suffix to make. If no sources are specified, any previously specified suffixes are deleted.

ENVIRONMENT

make uses the following environment variables, if they exist: MACHINE, MACHINE_ARCH, MACHINE_CPU, MAKEFLAGS, MAKEOBJDIR, MAKEOBJDIRPREFIX, and PWD. make also ignores and unsets CDPATH.

FILES

.depend

list of dependencies

BSDmakefile

default makefile

makefile

default makefile if BSDmakefile does not exist

Makefile

default makefile if makefile does not exist

sys.mk

system makefile

/usr/share/mk

system makefile directory

/usr/obj

default MAKEOBJDIRPREFIX directory

EXIT STATUS

If -q was specified, the make utility exits with one of the following values:

Otherwise, the make utility exits with a value of 0 on success, and >0 if an error occurred.

SEE ALSO

ed(1), mkdep(1), sh(1), getcwd(3), regex(3), uname(3)

STANDARDS

The make utility is compliant with the IEEE Std 1003.1-2008 (“POSIX.1”) specification, though its presence is optional.

The flags [-BDdIjmPV] are extensions to that specification.

Older versions of make used MAKE instead of MAKEFLAGS. This was removed for POSIX compatibility. The internal variable MAKE is set to the same value as .MAKE. Support for this may be removed in the future.

Most of the more esoteric features of make should probably be avoided for greater compatibility.

HISTORY

A make command appeared in Version 7 AT&T UNIX.

BUGS

The determination of .OBJDIR is contorted to the point of absurdity.

If the same target is specified several times in normal dependency rules, make silently ignores all commands after the first non empty set of commands, e.g., in

a:
	@echo "Executed"
a:
	@echo "Bad luck"

@echo "Bad luck" will be silently ignored.

.TARGETS is not set to the default target when make is invoked without a target name and no MAIN special target exists.

The evaluation of expression in a test is very simple-minded. Currently, the only form that works is ‘.if ${VAR} op something’. For instance, tests should be written as ‘.if ${VAR} == string’, not the other way around, which doesn't work.

For loops are expanded before tests, so a fragment such as:

.for TMACHINE in ${SHARED_ARCHS}
.if ${TMACHINE} == ${MACHINE}
     ...
.endif
.endfor

won't work, and should be rewritten the other way around.

When handling pre-BSD 4.4 archives, make may erroneously mark archive members as out of date if the archive name was truncated.

The handling of ‘;’ and other special characters in tests may be utterly bogus. For instance, in

A=abcd;c.c
.if ${A:R} == "abcd;c"

the test will never match, even though the value is correct.

The conditional handler is incredibly lame. Junk such as

will be accepted silently.

In a .for loop, only the variable value is used; assignments will be evaluated later, e.g., in

.for I in a b c d
I:=${I:S/a/z}
A+=$I
.endfor

‘A’ will evaluate to a b c d after the loop, not z b c d.

ORDER is only used in parallel mode, so keep dependency ordered for sequential mode!

Distinct target names are treated separately, even though they might correspond to the same file in the file system. This can cause excessive rebuilds of some targets, and bogus races in parallel mode. This can also prevent make from finding a rule to solve a dependency if the target name is not exactly the same as the dependency.

In parallel mode, -j n only limits the number of concurrent makes it knows about. During recursive invocations, each level will multiply the number of processes by n.

The MAKEFILE variable cannot be used reliably. It is a compatibility feature and may get set to the last makefile specified, as it is set by System V make.